[llvm] dd231f0 - [AArch64] Regenerate andandshift.ll test checks

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-05-23T11:48:24+01:00
New Revision: dd231f02a3eef7277ded7799eeac337faa664374

URL: https://github.com/llvm/llvm-project/commit/dd231f02a3eef7277ded7799eeac337faa664374
DIFF: https://github.com/llvm/llvm-project/commit/dd231f02a3eef7277ded7799eeac337faa664374.diff

LOG: [AArch64] Regenerate andandshift.ll test checks

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/andandshift.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/andandshift.ll b/llvm/test/CodeGen/AArch64/andandshift.ll
index e6019b36d597..00990ef4f5db 100644
--- a/llvm/test/CodeGen/AArch64/andandshift.ll
+++ b/llvm/test/CodeGen/AArch64/andandshift.ll
@@ -1,11 +1,15 @@
-; RUN: llc -O3 < %s | FileCheck %s 
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O3 < %s | FileCheck %s
+
 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
 target triple = "arm64--linux-gnu"
 
 ; Function Attrs: nounwind readnone
 define i32 @test1(i8 %a) {
-; CHECK-LABEL: @test1
-; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
+; CHECK-LABEL: test1:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ubfx w0, w0, #3, #5
+; CHECK-NEXT:    ret
 entry:
   %conv = zext i8 %a to i32
   %shr1 = lshr i32 %conv, 3
@@ -14,9 +18,13 @@ entry:
 
 ; Function Attrs: nounwind readnone
 define i32 @test2(i8 %a) {
-; CHECK-LABEL: @test2
-; CHECK: and {{w[0-9]+}}, w0, #0xff
-; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
+; CHECK-LABEL: test2:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    and w8, w0, #0xff
+; CHECK-NEXT:    ubfx w9, w0, #3, #5
+; CHECK-NEXT:    cmp w8, #47
+; CHECK-NEXT:    csel w0, w9, w8, hi
+; CHECK-NEXT:    ret
 entry:
   %conv = zext i8 %a to i32
   %cmp = icmp ugt i8 %a, 47