[PATCH] D125377: [AArch64] Order STP Q's by ascending address

[Andre Vieira via Phabricator via llvm-commits]

avieira added a comment.

Hi @Allen ,

I believe that 'scheduling doesn't matter for Out of Order cores' is a long-standing myth that we've seen not to be correct. Yes, scheduling is definitely different for out of order cores, the problem shifts towards thinking about a sliding window of instructions that go into specific pipelines and dispatch queues and the likes. And you now find yourself trying to optimize the utilisation of pipelines, avoiding bubbles, rather than looking for the 'perfect sequence'. Out of order execution has some other limits and in some cases it helps if the compiler can lend the core a hand. In this case the Neoverse N1 prefers ascending STP Q's and an updated Neoverse N1 Software Optimization Guide will be reflecting this.


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  https://reviews.llvm.org/D125377/new/

https://reviews.llvm.org/D125377