[PATCH] D125377: [AArch64] Order STP Q's by ascending address

[Allen zhong via Phabricator via llvm-commits]

Allen added a comment.

hi @avieira , Does  **Neoverse N1** Out of order execution, why does the order of instruction launch significantly affect the performance?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125377/new/

https://reviews.llvm.org/D125377