[llvm] d6994f7 - [M68k][Disassembler] Fix decoding conflict

[via llvm-commits]

Author: Sheng
Date: 2022-05-22T10:35:12+08:00
New Revision: d6994f7ccc25b81f59f5daf5374676ac2b00f08a

URL: https://github.com/llvm/llvm-project/commit/d6994f7ccc25b81f59f5daf5374676ac2b00f08a
DIFF: https://github.com/llvm/llvm-project/commit/d6994f7ccc25b81f59f5daf5374676ac2b00f08a.diff

LOG: [M68k][Disassembler] Fix decoding conflict

This diff fixes decoding conflict between move instructions and
their tail-call counterpart

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D125948

Added: 
    

Modified: 
    llvm/lib/Target/M68k/M68kInstrData.td

Removed: 
    


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diff  --git a/llvm/lib/Target/M68k/M68kInstrData.td b/llvm/lib/Target/M68k/M68kInstrData.td
index 1de461f6e9ac..863432b94005 100644
--- a/llvm/lib/Target/M68k/M68kInstrData.td
+++ b/llvm/lib/Target/M68k/M68kInstrData.td
@@ -205,7 +205,9 @@ let Pattern = [(null_frag)] in {
     foreach TYPE = [MxType16, MxType32] in
     def MOV # TYPE.Size # REG # AM # _TC
         : MxMove_RM<TYPE, REG, !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#AM),
-                    !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#AM)>;
+                    !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#AM)> {
+      let isCodeGenOnly = true;
+    }
   } // foreach AM
 } // let Pattern