[PATCH] D125787: [RISCV] Fix RVV stack frame alignment bugs

Sat May 21 06:24:54 PDT 2022

StephenFan accepted this revision.
StephenFan added a comment.
This revision is now accepted and ready to land.

In D125787#3528016 <https://reviews.llvm.org/D125787#3528016>, @frasercrmck wrote:

> In D125787#3527694 <https://reviews.llvm.org/D125787#3527694>, @StephenFan wrote:
>
>> And I also worried that if the size of RVV padding is big enough, the size of the local scalar variable field is out of the range of 12 bits signed number. If it is necessary to add an extra scavenger spill slot for it?
>
> We already reserve a scavenger slot if there are any RVV objects at all in the frame - I believe that this one reg is sufficient to cover this eventuality. I don't think there's anything special about RVV padding compared with just the number of scalar local variables being too large for a 12-bit int in the "regular" case.

You are right. Thanks for your explanation!

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  https://reviews.llvm.org/D125787/new/

https://reviews.llvm.org/D125787