[PATCH] D123782: [AArch64] Generate AND in place of CSEL for Table Based CTTZ lowering in -O3

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 20 00:11:51 PDT 2022

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dmgreen added a comment.

Thanks for checking. Lets give this another go then. LGTM


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Previous message: [PATCH] D123782: [AArch64] Generate AND in place of CSEL for Table Based CTTZ lowering in -O3
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