[PATCH] D124505: [RISCV] Add VL patterns for vector widening floating-point fused multiply-add instructions.
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 20 00:11:44 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8fc4fcecb8ce: [RISCV] Add VL patterns for vector widening floating-point fused multiply-add… (authored by jacquesguan).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124505/new/
https://reviews.llvm.org/D124505
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmacc.ll
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