[PATCH] D125965: [MIR] Provide location of extra instruction operand when diagnosing it.

[Ivan Kosarev via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG86803008eabb: [MIR] Provide location of extra instruction operand when diagnosing it. (authored by kosarev).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125965/new/

https://reviews.llvm.org/D125965

Files:
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
  llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir


Index: llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
===================================================================
--- llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
+++ llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
@@ -1,12 +1,13 @@
-# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | \
+# RUN:   FileCheck --strict-whitespace %s
 
 ---
 name: extra_reg_operand
 body: |
   bb.0:
-    ; CHECK: [[@LINE+3]]:29: too many operands for instruction
-    ; S_ENDPGM 0, undef $vgpr0
-    ; CHECK_NEXT:               ^
+    ; CHECK: [[@LINE+3]]:17: too many operands for instruction
+    ; CHECK-NEXT: {{^}}    S_ENDPGM 0, undef $vgpr0
+    ; CHECK-NEXT: {{^}}                ^
     S_ENDPGM 0, undef $vgpr0
 
 ...
Index: llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
===================================================================
--- llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
+++ llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
@@ -1,12 +1,13 @@
-# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -march=amdgcn -run-pass=none -o /dev/null %s 2>&1 | \
+# RUN:   FileCheck --strict-whitespace %s
 
 ---
 name: extra_imm_operand
 body: |
   bb.0:
-    ; CHECK: [[@LINE+3]]:18: too many operands for instruction
-    ; CHECK-NEXT: S_ENDPGM 0, 0
-    ; CHECK_NEXT:               ^
+    ; CHECK: [[@LINE+3]]:17: too many operands for instruction
+    ; CHECK-NEXT: {{^}}    S_ENDPGM 0, 0
+    ; CHECK-NEXT: {{^}}                ^
     S_ENDPGM 0, 0
 
 ...
Index: llvm/lib/CodeGen/MIRParser/MIParser.cpp
===================================================================
--- llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1100,7 +1100,7 @@
     if (!IsImplicitOp) {
       if (!MCID.isVariadic() && NumExplicitOps >= MCID.getNumOperands() &&
           !Operand.Operand.isValidExcessOperand())
-        return error("too many operands for instruction");
+        return error(Operand.Begin, "too many operands for instruction");
 
       ++NumExplicitOps;
     }


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