[PATCH] D125824: [AMDGPU] gfx11 export instructions
Joe Nash via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 19 10:08:05 PDT 2022
Joe_Nash added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp:642-643
+ if (STI.getFeatureBits()[AMDGPU::FeatureGFX11]) {
+ // The MCInst still has these fields even though they are no longer encoded
+ // in the GFX11 instruction.
+ insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vm);
----------------
foad wrote:
> arsenm wrote:
> > Why not remove them then? I guess that would just move the handling from MI->MC from the pseudo
> Probably just because I didn't know how to implement that. Is there a good place to do stuff like this when lowering from MI to MC?
It seems like there are 3 options: different pseudos between subtargets, handle this in MI->MC (I don't know if there are any examples of this?), and in the asm/disasm (quite common in AMDGPU). So is there anything to do here?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125824/new/
https://reviews.llvm.org/D125824
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