[PATCH] D125980: [AArch64] Fix the generation of BE Nops

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 19 08:16:20 PDT 2022


dmgreen created this revision.
dmgreen added reviewers: t.p.northover, efriedma, john.brawn, amilendra, NickGuy.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a project: LLVM.

Big endian Nops were being generated as `d5 03 20 1f   fnmadd  s21, s30, s0, s0`, getting the bytes of the NOP in the wrong order. This switches the bytes to not be dependant on the endianness.


https://reviews.llvm.org/D125980

Files:
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  llvm/test/MC/AArch64/align.s


Index: llvm/test/MC/AArch64/align.s
===================================================================
--- /dev/null
+++ llvm/test/MC/AArch64/align.s
@@ -0,0 +1,14 @@
+// RUN: llvm-mc -filetype=obj -triple aarch64-none-eabi %s | llvm-objdump -d - | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple aarch64_be-none-eabi %s | llvm-objdump -d - | FileCheck %s
+
+// CHECK:   0: 00 00 80 d2   mov     x0, #0
+// CHECK:   4: 00 00 80 d2   mov     x0, #0
+// CHECK:   8: 1f 20 03 d5   nop
+// CHECK:   c: 1f 20 03 d5   nop
+// CHECK:  10: 00 00 80 d2   mov     x0, #0
+
+       .text
+       mov x0, #0
+       mov x0, #0
+       .p2align 4
+       mov x0, #0
Index: llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
===================================================================
--- llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -471,7 +471,7 @@
   // We are properly aligned, so write NOPs as requested.
   Count /= 4;
   for (uint64_t i = 0; i != Count; ++i)
-    support::endian::write<uint32_t>(OS, 0xd503201f, Endian);
+    OS.write("\x1f\x20\x03\xd5", 4);
   return true;
 }
 


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