[PATCH] D125973: [RISCV] Ensure the entire stack is aligned to the RVV stack alignment
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 19 07:04:48 PDT 2022
frasercrmck created this revision.
frasercrmck added reviewers: rogfer01, HsiangKai, kito-cheng, craig.topper, reames, StephenFan.
Herald added subscribers: sunshaoce, VincentWu, luke957, vkmr, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, arichardson.
Herald added a project: All.
frasercrmck requested review of this revision.
Herald added subscribers: llvm-commits, alextsao1999, pcwang-thead, eopXD, MaskRay.
Herald added a project: LLVM.
This patch fixes another bug in the RVV frame lowering. While some frame
objects with non-default stack IDs (such scalable-vector alloca
instructions) are considered in the target-independent max alignment
calculations, others (for example, during calling-convention lowering)
are not. This means we'd occasionally align the base of the stack to
only 16 bytes, with no way to ensure that the RVV section contained
within that is aligned to anything higher.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D125973
Files:
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
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