[llvm] df25f0d - [M68k] Fix a bug in disassembler

via llvm-commits llvm-commits at lists.llvm.org
Thu May 19 06:20:01 PDT 2022


Author: Sheng
Date: 2022-05-19T21:19:44+08:00
New Revision: df25f0d5202bbd9e2e909dccb1aa16f8ebad5e7b

URL: https://github.com/llvm/llvm-project/commit/df25f0d5202bbd9e2e909dccb1aa16f8ebad5e7b
DIFF: https://github.com/llvm/llvm-project/commit/df25f0d5202bbd9e2e909dccb1aa16f8ebad5e7b.diff

LOG: [M68k] Fix a bug in disassembler

Sorry for my reckless patch. In some cases `RoundUp` is less than
the bit width of APInt. We need to check this before we do zext.

Added: 
    

Modified: 
    llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp b/llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp
index 79cd84793bdf..6fb98aa838c0 100644
--- a/llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp
+++ b/llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp
@@ -120,7 +120,8 @@ DecodeStatus M68kDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
   auto MakeUp = [&](APInt &Insn, unsigned InstrBits) {
     unsigned Idx = Insn.getBitWidth() >> 3;
     unsigned RoundUp = alignTo(InstrBits, Align(16));
-    Insn = Insn.zext(RoundUp);
+    if (RoundUp > Insn.getBitWidth())
+      Insn = Insn.zext(RoundUp);
     RoundUp = RoundUp >> 3;
     for (; Idx < RoundUp; Idx += 2) {
       Insn.insertBits(support::endian::read16be(&Bytes[Idx]), Idx * 8, 16);


        


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