[PATCH] D125918: [LV] Improve register pressure estimate at high VFs

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

I think for the case of D118979 <https://reviews.llvm.org/D118979> it makes sense to prevent maximizing the vector bandwidth for fixed-length sve. The larger vectors will already be wide enough and as far as I understand they don't benefit from the wider types in the same way that NEON does.

It sounds like this will be useful in either case though. The same thing could potentially happen with 128xi1 types. And it looks like it is used in the interleaving factor calculations.



================
Comment at: llvm/test/Transforms/LoopVectorize/AArch64/i1-reg-usage.ll:14
+
+define i1 @or_reduction_neon(i32 %arg, ptr %ptr) "target-features"="+neon" {
+entry:
----------------
I don't think this need the target-feature=+neon


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  https://reviews.llvm.org/D125918/new/

https://reviews.llvm.org/D125918