[llvm] 90ea81f - [LV] Widen freeze instead of scalarizing it
via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 21:29:21 PDT 2022
Author: lizhijin
Date: 2022-05-19T12:28:01+08:00
New Revision: 90ea81fcb28e48c080e1a9016dd5262eeb33d0ce
URL: https://github.com/llvm/llvm-project/commit/90ea81fcb28e48c080e1a9016dd5262eeb33d0ce
DIFF: https://github.com/llvm/llvm-project/commit/90ea81fcb28e48c080e1a9016dd5262eeb33d0ce.diff
LOG: [LV] Widen freeze instead of scalarizing it
This patch changes the strategy for vectorizing freeze instrucion, from
replicating multiple times to widening according to selected VF.
Fixes #54992
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D125016
Added:
llvm/test/Transforms/LoopVectorize/vector-freeze.ll
Modified:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index d33bea47e0341..4bd3c2f35fe5d 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -8444,6 +8444,7 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I,
case Instruction::URem:
case Instruction::Xor:
case Instruction::ZExt:
+ case Instruction::Freeze:
return true;
}
return false;
@@ -9367,6 +9368,17 @@ void VPWidenRecipe::execute(VPTransformState &State) {
break;
}
+ case Instruction::Freeze: {
+ State.ILV->setDebugLocFromInst(&I);
+
+ for (unsigned Part = 0; Part < State.UF; ++Part) {
+ Value *Op = State.get(getOperand(0), Part);
+
+ Value *Freeze = Builder.CreateFreeze(Op);
+ State.set(this, Freeze, Part);
+ }
+ break;
+ }
case Instruction::ICmp:
case Instruction::FCmp: {
// Widen compares. Generate vector compares.
diff --git a/llvm/test/Transforms/LoopVectorize/vector-freeze.ll b/llvm/test/Transforms/LoopVectorize/vector-freeze.ll
new file mode 100644
index 0000000000000..a1eb7b31a256f
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/vector-freeze.ll
@@ -0,0 +1,26 @@
+; RUN: opt -loop-vectorize -force-vector-width=16 -force-vector-interleave=1 -S < %s | FileCheck %s
+; RUN: opt -loop-vectorize -scalable-vectorization=on -force-target-supports-scalable-vectors=true -force-vector-width=16 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=SVE
+
+define i64 @test(ptr noalias readonly %addr) {
+; CHECK-LABEL: @test(
+; CHECK: vector.body:
+; CHECK: freeze <16 x i64>
+
+; SVE-LABEL: @test(
+; SVE: vector.body:
+; SVE: freeze <vscale x 16 x i64>
+
+entry:
+ br label %loop
+
+exit:
+ ret i64 %tmp4
+
+loop:
+ %tmp3 = phi ptr [ %tmp6, %loop ], [ %addr, %entry ]
+ %tmp4 = freeze i64 0
+ %tmp5 = add i64 0, 0
+ %tmp6 = getelementptr inbounds ptr, ptr %tmp3, i64 1
+ %tmp7 = icmp eq ptr %tmp6, null
+ br i1 %tmp7, label %exit, label %loop
+}
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