[PATCH] D125760: [LegalizeTypes][VP] Add integer promotion support for vp.fptosi/vp.fptoui
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 20:30:40 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:686
+ } else if (NewOpc == ISD::VP_FPTOSI || NewOpc == ISD::VP_FPTOUI)
+ Res = DAG.getNode(NewOpc, dl, NVT, {N->getOperand(0), N->getOperand(1),
+ N->getOperand(2)});
----------------
That's not what I meant.
I meant to be curly braces around the DAG node calls. LLVM coding standards say that if the `if` needs curly braces each of the `else`s do too.
See the 4th example here https://llvm.org/docs/CodingStandards.html#don-t-use-braces-on-simple-single-statement-bodies-of-if-else-loop-statements "Use braces for the `if` block to keep it uniform with the else block."
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125760/new/
https://reviews.llvm.org/D125760
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