[PATCH] D125760: [LegalizeTypes][VP] Add integer promotion support for vp.fptosi/vp.fptoui
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 16:39:47 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:685
ReplaceValueWith(SDValue(N, 1), Res.getValue(1));
- } else
+ } else if (NewOpc == ISD::VP_FPTOSI || NewOpc == ISD::VP_FPTOUI)
+ Res = DAG.getNode(NewOpc, dl, NVT, N->getOperand(0), N->getOperand(1),
----------------
Use curly braces for both elses to match the first if.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:673
+ if (N->getOpcode() == ISD::VP_FPTOUI &&
+ !TLI.isOperationLegal(ISD::VP_FPTOUI, NVT) &&
----------------
Pretty-box wrote:
> craig.topper wrote:
> > Pretty-box wrote:
> > > Does this code need to be added?Because ISD::VP_FPTOUI/ISD::VP_FPTOSI is considered illegal on RISCV(use custom model) . From the illegal FPTOUI test results, signed conversion instruction is used rather than unsigned conversion instruction. Is this result correct?@craig.topper
> > Does the same thing happen with non-vp for fixed vectors?
> Yes, you can refer to the new added test cases,the fptoui tests using signed conversion instructions.
I'd prefer to keep it for consistency. I don't have a good idea how to fix the ISD::FP_TO_UINT case right now.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125760/new/
https://reviews.llvm.org/D125760
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