[PATCH] D125836: [DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m) (WIP)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 12:28:28 PDT 2022
RKSimon updated this revision to Diff 430476.
RKSimon added a comment.
rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125836/new/
https://reviews.llvm.org/D125836
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
llvm/test/CodeGen/AArch64/arm64-rev.ll
llvm/test/CodeGen/AArch64/ushl_sat.ll
llvm/test/CodeGen/AMDGPU/idot4s.ll
llvm/test/CodeGen/AMDGPU/idot8s.ll
llvm/test/CodeGen/AMDGPU/idot8u.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
llvm/test/CodeGen/ARM/umulo-32.ll
llvm/test/CodeGen/X86/pr32588.ll
llvm/test/CodeGen/X86/pull-binop-through-shift.ll
llvm/test/CodeGen/X86/rotate-extract-vector.ll
llvm/test/CodeGen/X86/rotate-extract.ll
llvm/test/CodeGen/X86/shift-mask.ll
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