[llvm] 3f7fc09 - [X86] Regenerate select-ext.ll test for D125604
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed May 18 04:26:43 PDT 2022
Author: Simon Pilgrim
Date: 2022-05-18T12:25:45+01:00
New Revision: 3f7fc0964e827a6f9900714ee47fa5f8f75b46d1
URL: https://github.com/llvm/llvm-project/commit/3f7fc0964e827a6f9900714ee47fa5f8f75b46d1
DIFF: https://github.com/llvm/llvm-project/commit/3f7fc0964e827a6f9900714ee47fa5f8f75b46d1.diff
LOG: [X86] Regenerate select-ext.ll test for D125604
GlobalISel tests are barely supported on X86, so just regenerate for now to avoid a blocker
Added:
Modified:
llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir b/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
index 4b790c41bc909..5bb95b9bfaf6d 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
@@ -1,5 +1,6 @@
-# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
-# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X86
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X64
--- |
define i8 @test_zext_i1toi8(i1 %a) {
@@ -47,33 +48,30 @@
...
---
name: test_zext_i1toi8
-# ALL-LABEL: name: test_zext_i1toi8
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr8, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr8, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
-# X32: %0:gr32_abcd = COPY $edi
-# X64: %0:gr32 = COPY $edi
-# ALL_NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL_NEXT: %2:gr8 = AND8ri %1, 1, implicit-def $eflags
-# ALL_NEXT: $al = COPY %2
-# ALL_NEXT: RET 0, implicit $al
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_zext_i1toi8
+ ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X86-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags
+ ; X86-NEXT: $al = COPY [[AND8ri]]
+ ; X86-NEXT: RET 0, implicit $al
+ ; X64-LABEL: name: test_zext_i1toi8
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags
+ ; X64-NEXT: $al = COPY [[AND8ri]]
+ ; X64-NEXT: RET 0, implicit $al
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s8) = G_ZEXT %1(s1)
@@ -83,36 +81,34 @@ body: |
...
---
name: test_zext_i1toi16
-# ALL-LABEL: name: test_zext_i1toi16
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr16, preferred-register: '' }
-# X32-NEXT: - { id: 3, class: gr16, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr16, preferred-register: '' }
-# X64-NEXT: - { id: 3, class: gr16, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
-# X32: %0:gr32_abcd = COPY $edi
-# X64: %0:gr32 = COPY $edi
-# ALL_NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL_NEXT: %3:gr16 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
-# ALL_NEXT: %2:gr16 = AND16ri8 %3, 1, implicit-def $eflags
-# ALL_NEXT: $ax = COPY %2
-# ALL_NEXT: RET 0, implicit $ax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_zext_i1toi16
+ ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X86-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
+ ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
+ ; X86-NEXT: [[AND16ri8_:%[0-9]+]]:gr16 = AND16ri8 [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X86-NEXT: $ax = COPY [[AND16ri8_]]
+ ; X86-NEXT: RET 0, implicit $ax
+ ; X64-LABEL: name: test_zext_i1toi16
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
+ ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
+ ; X64-NEXT: [[AND16ri8_:%[0-9]+]]:gr16 = AND16ri8 [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X64-NEXT: $ax = COPY [[AND16ri8_]]
+ ; X64-NEXT: RET 0, implicit $ax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s16) = G_ZEXT %1(s1)
@@ -122,36 +118,34 @@ body: |
...
---
name: test_zext_i1
-# ALL-LABEL: name: test_zext_i1
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr32, preferred-register: '' }
-# X32-NEXT: - { id: 3, class: gr32, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 3, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# X32: %0:gr32_abcd = COPY $edi
-# X64: %0:gr32 = COPY $edi
-# ALL_NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL_NEXT: %3:gr32 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
-# ALL_NEXT: %2:gr32 = AND32ri8 %3, 1, implicit-def $eflags
-# ALL_NEXT: $eax = COPY %2
-# ALL_NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_zext_i1
+ ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X86-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
+ ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
+ ; X86-NEXT: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X86-NEXT: $eax = COPY [[AND32ri8_]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_zext_i1
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
+ ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
+ ; X64-NEXT: [[AND32ri8_:%[0-9]+]]:gr32 = AND32ri8 [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X64-NEXT: $eax = COPY [[AND32ri8_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s32) = G_ZEXT %1(s1)
@@ -161,24 +155,27 @@ body: |
...
---
name: test_zext_i8
-# ALL-LABEL: name: test_zext_i8
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
-# ALL: %0:gr8 = COPY $dil
-# ALL-NEXT: %1:gr32 = MOVZX32rr8 %0
-# ALL-NEXT: $eax = COPY %1
-# ALL-NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_zext_i8
+ ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
+ ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_zext_i8
+ ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
+ ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
@@ -187,24 +184,27 @@ body: |
...
---
name: test_zext_i16
-# ALL-LABEL: name: test_zext_i16
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
-# ALL: %0:gr16 = COPY $di
-# ALL-NEXT: %1:gr32 = MOVZX32rr16 %0
-# ALL-NEXT: $eax = COPY %1
-# ALL-NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_zext_i16
+ ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X86-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]]
+ ; X86-NEXT: $eax = COPY [[MOVZX32rr16_]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_zext_i16
+ ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X64-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]]
+ ; X64-NEXT: $eax = COPY [[MOVZX32rr16_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $di
%1(s32) = G_ZEXT %0(s16)
$eax = COPY %1(s32)
@@ -213,24 +213,27 @@ body: |
...
---
name: test_sext_i8
-# ALL-LABEL: name: test_sext_i8
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
-# ALL: %0:gr8 = COPY $dil
-# ALL-NEXT: %1:gr32 = MOVSX32rr8 %0
-# ALL-NEXT: $eax = COPY %1
-# ALL-NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_sext_i8
+ ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X86-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]]
+ ; X86-NEXT: $eax = COPY [[MOVSX32rr8_]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_sext_i8
+ ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X64-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]]
+ ; X64-NEXT: $eax = COPY [[MOVSX32rr8_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s32) = G_SEXT %0(s8)
$eax = COPY %1(s32)
@@ -239,24 +242,27 @@ body: |
...
---
name: test_sext_i16
-# ALL-LABEL: name: test_sext_i16
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
-# ALL: %0:gr16 = COPY $di
-# ALL-NEXT: %1:gr32 = MOVSX32rr16 %0
-# ALL-NEXT: $eax = COPY %1
-# ALL-NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_sext_i16
+ ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X86-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]]
+ ; X86-NEXT: $eax = COPY [[MOVSX32rr16_]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_sext_i16
+ ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X64-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]]
+ ; X64-NEXT: $eax = COPY [[MOVSX32rr16_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $di
%1(s32) = G_SEXT %0(s16)
$eax = COPY %1(s32)
@@ -265,32 +271,28 @@ body: |
...
---
name: test_anyext_i1toi8
-# ALL-LABEL: name: test_anyext_i1toi8
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr8, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr8, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# X32: %0:gr32_abcd = COPY $edi
-# X64: %0:gr32 = COPY $edi
-# ALL-NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL-NEXT: $al = COPY %1
-# ALL-NEXT: RET 0, implicit $al
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_anyext_i1toi8
+ ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X86-NEXT: $al = COPY [[COPY1]]
+ ; X86-NEXT: RET 0, implicit $al
+ ; X64-LABEL: name: test_anyext_i1toi8
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: $al = COPY [[COPY1]]
+ ; X64-NEXT: RET 0, implicit $al
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s8) = G_ANYEXT %1(s1)
@@ -299,33 +301,30 @@ body: |
...
---
name: test_anyext_i1toi16
-# ALL-LABEL: name: test_anyext_i1toi16
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr16, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr16, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# X32: %0:gr32_abcd = COPY $edi
-# X64: %0:gr32 = COPY $edi
-# ALL-NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL-NEXT: %2:gr16 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
-# ALL-NEXT: $ax = COPY %2
-# ALL-NEXT: RET 0, implicit $ax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_anyext_i1toi16
+ ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
+ ; X86-NEXT: $ax = COPY [[SUBREG_TO_REG]]
+ ; X86-NEXT: RET 0, implicit $ax
+ ; X64-LABEL: name: test_anyext_i1toi16
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
+ ; X64-NEXT: $ax = COPY [[SUBREG_TO_REG]]
+ ; X64-NEXT: RET 0, implicit $ax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s16) = G_ANYEXT %1(s1)
@@ -334,33 +333,30 @@ body: |
...
---
name: test_anyext_i1toi32
-# ALL-LABEL: name: test_anyext_i1toi32
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr32, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# X32: %0:gr32_abcd = COPY $edi
-# X64: %0:gr32 = COPY $edi
-# ALL-NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL-NEXT: %2:gr32 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_anyext_i1toi32
+ ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
+ ; X86-NEXT: $eax = COPY [[SUBREG_TO_REG]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_anyext_i1toi32
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
+ ; X64-NEXT: $eax = COPY [[SUBREG_TO_REG]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s1)
@@ -369,38 +365,33 @@ body: |
...
---
name: test_anyext_i8toi16
-# ALL-LABEL: name: test_anyext_i8toi16
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr16, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr16, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# X32: %0:gr32 = COPY $edi
-# X32-NEXT: %4:gr32_abcd = COPY %0
-# X32-NEXT: %1:gr8_abcd_l = COPY %4.sub_8bit
-# X64: %0:gr32 = COPY $edi
-# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
-
-# ALL-NEXT: %3:gr32 = MOVZX32rr8 %1
-# ALL-NEXT: %2:gr16 = COPY %3.sub_16bit
-# ALL-NEXT: $ax = COPY %2
-# ALL-NEXT: RET 0, implicit $ax
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_anyext_i8toi16
+ ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
+ ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
+ ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
+ ; X86-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit
+ ; X86-NEXT: $ax = COPY [[COPY3]]
+ ; X86-NEXT: RET 0, implicit $ax
+ ; X64-LABEL: name: test_anyext_i8toi16
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
+ ; X64-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit
+ ; X64-NEXT: $ax = COPY [[COPY2]]
+ ; X64-NEXT: RET 0, implicit $ax
%0(s32) = COPY $edi
%1(s8) = G_TRUNC %0(s32)
%2(s16) = G_ANYEXT %1(s8)
@@ -409,37 +400,31 @@ body: |
...
---
name: test_anyext_i8toi32
-# ALL-LABEL: name: test_anyext_i8toi32
alignment: 16
legalized: true
regBankSelected: true
-# X32: registers:
-# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '' }
-# X32-NEXT: - { id: 2, class: gr32, preferred-register: '' }
-#
-# X64: registers:
-# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# X64-NEXT: - { id: 2, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# X32: %0:gr32 = COPY $edi
-# X32-NEXT: %3:gr32_abcd = COPY %0
-# X32-NEXT: %1:gr8_abcd_l = COPY %3.sub_8bit
-
-# X64: %0:gr32 = COPY $edi
-# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL-NEXT: %2:gr32 = MOVZX32rr8 %1
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_anyext_i8toi32
+ ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
+ ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
+ ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
+ ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_anyext_i8toi32
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
+ ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
%1(s8) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s8)
@@ -448,29 +433,32 @@ body: |
...
---
name: test_anyext_i16toi32
-# ALL-LABEL: name: test_anyext_i16toi32
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '' }
-# ALL-NEXT: - { id: 2, class: low32_addr_access_rbp, preferred-register: '' }
-# ALL-NEXT: - { id: 3, class: low32_addr_access_rbp, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
-# ALL: %0:gr32 = COPY $edi
-# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
-# ALL-NEXT: %3:low32_addr_access_rbp = IMPLICIT_DEF
-# ALL-NEXT: %2:low32_addr_access_rbp = INSERT_SUBREG %3, %1, %subreg.sub_16bit
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
+
body: |
bb.1 (%ir-block.0):
liveins: $edi
+ ; X86-LABEL: name: test_anyext_i16toi32
+ ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X86-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
+ ; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
+ ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
+ ; X86-NEXT: $eax = COPY [[INSERT_SUBREG]]
+ ; X86-NEXT: RET 0, implicit $eax
+ ; X64-LABEL: name: test_anyext_i16toi32
+ ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
+ ; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
+ ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
+ ; X64-NEXT: $eax = COPY [[INSERT_SUBREG]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
%1(s16) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s16)
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