[PATCH] D125604: [FileCheck] Catch missspelled directives.

Ivan Kosarev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 18 04:20:50 PDT 2022


kosarev updated this revision to Diff 430322.
kosarev added a comment.
Herald added a reviewer: bollu.

Add Polly fixes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125604/new/

https://reviews.llvm.org/D125604

Files:
  clang/test/CodeGen/cmse-clear-return.c
  clang/test/CodeGenCXX/attr-mustprogress.cpp
  clang/test/CodeGenCXX/eh-aggregate-copy-destroy.cpp
  clang/test/CodeGenCXX/inheriting-constructor.cpp
  clang/test/CodeGenObjC/non-runtime-protocol.m
  clang/test/OpenMP/master_taskloop_private_codegen.cpp
  clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp
  clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp
  clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp
  clang/test/OpenMP/task_private_codegen.cpp
  clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
  clang/test/OpenMP/taskloop_private_codegen.cpp
  clang/test/OpenMP/taskloop_simd_private_codegen.cpp
  llvm/include/llvm/FileCheck/FileCheck.h
  llvm/lib/FileCheck/FileCheck.cpp
  llvm/test/Analysis/MemorySSA/phi-translation.ll
  llvm/test/Analysis/RegionInfo/infinite_loop_4.ll
  llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
  llvm/test/CodeGen/AArch64/neon-vmull-high-p64.ll
  llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
  llvm/test/CodeGen/AMDGPU/hoist-cond.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
  llvm/test/CodeGen/AMDGPU/mode-register.mir
  llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
  llvm/test/CodeGen/AMDGPU/smrd.ll
  llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
  llvm/test/CodeGen/AVR/atomics/fence.ll
  llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
  llvm/test/CodeGen/MIR/AMDGPU/extra-imm-operand.mir
  llvm/test/CodeGen/MIR/AMDGPU/extra-reg-operand.mir
  llvm/test/CodeGen/Thumb2/thumb2-execute-only-prologue.ll
  llvm/test/CodeGen/WebAssembly/libcalls.ll
  llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
  llvm/test/CodeGen/X86/coalesce-dead-lanes.mir
  llvm/test/CodeGen/X86/copy-propagation.ll
  llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
  llvm/test/CodeGen/X86/statepoint-vreg-details.ll
  llvm/test/DebugInfo/NVPTX/debug-info.ll
  llvm/test/DebugInfo/X86/debug-info-template-parameter.ll
  llvm/test/FileCheck/missspelled-directive.txt
  llvm/test/MC/AMDGPU/data.s
  llvm/test/MC/AsmParser/directive_file-g.s
  llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s
  llvm/test/MC/WebAssembly/unnamed-data.ll
  llvm/test/Transforms/Inline/inline-strictfp.ll
  llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
  llvm/test/Transforms/MergeFunc/alias.ll
  llvm/test/Transforms/PGOProfile/PR41279.ll
  llvm/test/Transforms/PGOProfile/memop_clone.ll
  llvm/test/Transforms/PGOProfile/memop_size_from_strlen.ll
  llvm/test/tools/llvm-dwp/X86/tu_units_v5.s
  llvm/test/tools/llvm-dwp/X86/type_dedup_v5.test
  llvm/test/tools/llvm-objdump/MachO/disassemble-all.test
  llvm/test/tools/llvm-readobj/COFF/unwind-arm64-windows.test
  mlir/test/Conversion/MemRefToSPIRV/alloc.mlir
  mlir/test/Dialect/Affine/loop-coalescing.mlir
  mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
  mlir/test/Dialect/Linalg/tile-and-fuse-no-fuse.mlir
  mlir/test/Dialect/MemRef/canonicalize.mlir
  mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
  mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
  mlir/test/IR/dynamic.mlir
  mlir/test/mlir-tblgen/op-decl-and-defs.td
  polly/test/ScopDetect/dot-scops-npm.ll

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