[PATCH] D125861: [M68k][Disassembler] Fix decoding conflict

[Sheng via Phabricator via llvm-commits]

0x59616e marked an inline comment as done.
0x59616e added inline comments.


================
Comment at: llvm/lib/Target/M68k/M68kInstrArithmetic.td:79
+      !eq(SRC_TYPE.RLet, "d") : (descend 0b000, (operand "$opd", 3))
+    )
   );
----------------
ricky26 wrote:
> How does this avoid the conflict? Presumably the 'r' version could still specify a data register and it would have the same encoding? 🤔 
In our cases, the decoder emitter will recurse down to only two cases, that is, the one with 'r' addressing mode and the 'd' addressing mode. In this special case, decoder emitter will prefer the one with less entropy, i.e. 'd' addressing mode.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125861/new/

https://reviews.llvm.org/D125861