[PATCH] D125846: [StackProtector] Allow targets to specify an instruction is part of terminator sequence

[Nemanja Ivanovic via Phabricator via llvm-commits]

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When the basic block is being split up to insert stack protector checks/traps, it is spliced prior to the instructions needed by the terminator. This includes implicit defs and register copies required by the ABI. However, on certain targets, there may be instructions that are part of such a terminator sequence but are not strictly speaking register copies.
Such is the case with the PowerPC "Move to count register" instruction. The instruction implicitly defines the count register that is used by the subsequent branch.

On PowerPC, if the target is not allowed to specify that the instruction is part of the terminator sequence, the block gets spliced between the instruction that sets up the CTR and the instruction that uses it (such as an indirect tail call).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D125846

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/CodeGenCommonISel.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.h
  llvm/test/CodeGen/PowerPC/safestack-indirect-tailcall.ll

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