[lld] 8527f32 - [lld][ELF] Support BFD name elf32-avr

Ben Shi via llvm-commits llvm-commits at lists.llvm.org
Tue May 17 17:00:56 PDT 2022


Author: Ben Shi
Date: 2022-05-18T00:00:14Z
New Revision: 8527f32f0a16a77edb0b53a5ab8074e518eeff54

URL: https://github.com/llvm/llvm-project/commit/8527f32f0a16a77edb0b53a5ab8074e518eeff54
DIFF: https://github.com/llvm/llvm-project/commit/8527f32f0a16a77edb0b53a5ab8074e518eeff54.diff

LOG: [lld][ELF] Support BFD name elf32-avr

Reviewed By: MaskRay

differential Revision: https://reviews.llvm.org/D125544

Added: 
    lld/test/ELF/linkerscript/avr5.test

Modified: 
    lld/ELF/ScriptParser.cpp

Removed: 
    


################################################################################
diff  --git a/lld/ELF/ScriptParser.cpp b/lld/ELF/ScriptParser.cpp
index e7e42aa77e0b..9a1e0d5263c4 100644
--- a/lld/ELF/ScriptParser.cpp
+++ b/lld/ELF/ScriptParser.cpp
@@ -415,6 +415,7 @@ void ScriptParser::readOutputArch() {
 static std::pair<ELFKind, uint16_t> parseBfdName(StringRef s) {
   return StringSwitch<std::pair<ELFKind, uint16_t>>(s)
       .Case("elf32-i386", {ELF32LEKind, EM_386})
+      .Case("elf32-avr", {ELF32LEKind, EM_AVR})
       .Case("elf32-iamcu", {ELF32LEKind, EM_IAMCU})
       .Case("elf32-littlearm", {ELF32LEKind, EM_ARM})
       .Case("elf32-x86-64", {ELF32LEKind, EM_X86_64})

diff  --git a/lld/test/ELF/linkerscript/avr5.test b/lld/test/ELF/linkerscript/avr5.test
new file mode 100644
index 000000000000..4136dbdeb1ec
--- /dev/null
+++ b/lld/test/ELF/linkerscript/avr5.test
@@ -0,0 +1,52 @@
+# REQUIRES: avr
+
+## Test ld.lld supports OUTPUT_FORMAT/OUTPUT_ARCH for AVR output.
+
+# RUN: split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=avr -mcpu=atmega328 %t/avr5.s -o %t/avr5.o
+# RUN: ld.lld %t/avr5.o -T %t/avr5.lds -o %t/avr5a.out
+# RUN: llvm-objdump --mcpu=atmega328 -d %t/avr5a.out | FileCheck %s --check-prefix=RELOC
+# RUN: ld.lld %t/avr5.o -Ttext=0 -Tdata=0x800 -e _start -o %t/avr5b.out
+# RUN: llvm-objdump --mcpu=atmega328 -d %t/avr5b.out | FileCheck %s --check-prefix=RELOC
+
+# RELOC:      ldi  r24, 2
+# RELOC-NEXT: ldi  r25, 8
+
+# RUN: llvm-readelf --headers %t/avr5a.out | FileCheck %s --check-prefix=HEAD
+# RUN: llvm-readelf --headers %t/avr5b.out | FileCheck %s --check-prefix=HEAD
+
+# HEAD: Atmel AVR 8-bit microcontroller
+# HEAD: 0x5, EF_AVR_ARCH_AVR5
+
+# HEAD:      Name     Type      Address   Off     Size
+# HEAD-NEXT:          NULL      00000000  000000  000000
+# HEAD-NEXT: .text    PROGBITS  00000000  001000  000006
+# HEAD-NEXT: .data    PROGBITS  00000800  001800  000004
+
+#--- avr5.s
+	.text
+	.globl _start
+	.p2align 1
+_start:
+	ldi   r24, lo8(def) ; Load lower byte of variable def 16-bit address to r24
+	ldi   r25, hi8(def) ; Load higher byte of variable def 16-bit address to r25
+	rjmp  _start
+
+	.section .data
+	.type abc, @object
+	.type def, @object
+	.globl abc
+	.globl def
+abc:
+	.short 100
+def:
+	.short 200
+
+#--- avr5.lds
+OUTPUT_FORMAT("elf32-avr", "elf32-avr", "elf32-avr")
+OUTPUT_ARCH(avr:5)
+ENTRY(_start)
+SECTIONS {
+	.text 0x000: { *(.text*) }
+	.data 0x800: { *(.data*) }
+}


        


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