[llvm] 118c5d1 - [RISCV] Minor reorganization of VSETVLIInfo::operator== for readability [NFC]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2022-05-17T12:05:17-07:00
New Revision: 118c5d1c97b4191678663bf2a938eee7dec6f0b1

URL: https://github.com/llvm/llvm-project/commit/118c5d1c97b4191678663bf2a938eee7dec6f0b1
DIFF: https://github.com/llvm/llvm-project/commit/118c5d1c97b4191678663bf2a938eee7dec6f0b1.diff

LOG: [RISCV] Minor reorganization of VSETVLIInfo::operator== for readability [NFC]

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 406285917704..fb3220eb9ab5 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -317,16 +317,16 @@ class VSETVLIInfo {
     if (!hasSameAVL(Other))
       return false;
 
+    // If the SEWLMULRatioOnly bits are 
diff erent, then they aren't equal.
+    if (SEWLMULRatioOnly != Other.SEWLMULRatioOnly)
+      return false;
+
     // If only the VLMAX is valid, check that it is the same.
-    if (SEWLMULRatioOnly && Other.SEWLMULRatioOnly)
+    if (SEWLMULRatioOnly)
       return hasSameVLMAX(Other);
 
     // If the full VTYPE is valid, check that it is the same.
-    if (!SEWLMULRatioOnly && !Other.SEWLMULRatioOnly)
-      return hasSameVTYPE(Other);
-
-    // If the SEWLMULRatioOnly bits are 
diff erent, then they aren't equal.
-    return false;
+    return hasSameVTYPE(Other);
   }
 
   bool operator!=(const VSETVLIInfo &Other) const {