[PATCH] D125748: [RISCV] Drop notion of "strict" vsetvli compatibility
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 17 07:37:04 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8430b8274195: [RISCV] Drop notion of "strict" vsetvli compatibility (authored by frasercrmck).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125748/new/
https://reviews.llvm.org/D125748
Files:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Index: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -215,14 +215,11 @@
MaskAgnostic == Other.MaskAgnostic;
}
- bool hasCompatibleVTYPE(const VSETVLIInfo &Require, bool Strict) const {
+ bool hasCompatibleVTYPE(const VSETVLIInfo &Require) const {
// Simple case, see if full VTYPE matches.
if (hasSameVTYPE(Require))
return true;
- if (Strict)
- return false;
-
// If this is a mask reg operation, it only cares about VLMAX.
// FIXME: Mask reg operations are probably ok if "this" VLMAX is larger
// than "Require".
@@ -238,7 +235,7 @@
// Determine whether the vector instructions requirements represented by
// Require are compatible with the previous vsetvli instruction represented
// by this.
- bool isCompatible(const VSETVLIInfo &Require, bool Strict) const {
+ bool isCompatible(const VSETVLIInfo &Require) const {
assert(isValid() && Require.isValid() &&
"Can't compare invalid VSETVLIInfos");
assert(!Require.SEWLMULRatioOnly &&
@@ -253,16 +250,14 @@
// If the instruction doesn't need an AVLReg and the SEW matches, consider
// it compatible.
- if (!Strict && Require.hasAVLReg() &&
- Require.AVLReg == RISCV::NoRegister) {
+ if (Require.hasAVLReg() && Require.AVLReg == RISCV::NoRegister)
if (SEW == Require.SEW)
return true;
- }
// For vmv.s.x and vfmv.s.f, there is only two behaviors, VL = 0 and VL > 0.
// So it's compatible when we could make sure that both VL be the same
// situation.
- if (!Strict && Require.ScalarMovOp && Require.hasAVLImm() &&
+ if (Require.ScalarMovOp && Require.hasAVLImm() &&
((hasNonZeroAVL() && Require.hasNonZeroAVL()) ||
(hasZeroAVL() && Require.hasZeroAVL())) &&
hasSameSEW(Require) && hasSamePolicy(Require))
@@ -272,13 +267,9 @@
if (!hasSameAVL(Require))
return false;
- if (hasCompatibleVTYPE(Require, Strict))
+ if (hasCompatibleVTYPE(Require))
return true;
- // Strict matches must ensure a full VTYPE match.
- if (Strict)
- return false;
-
// Store instructions don't use the policy fields.
// TODO: Move into hasCompatibleVTYPE?
if (Require.StoreOp && VLMul == Require.VLMul && SEW == Require.SEW)
@@ -706,7 +697,7 @@
bool RISCVInsertVSETVLI::needVSETVLI(const VSETVLIInfo &Require,
const VSETVLIInfo &CurInfo) {
- if (CurInfo.isCompatible(Require, /*Strict*/ false))
+ if (CurInfo.isCompatible(Require))
return false;
// We didn't find a compatible value. If our AVL is a virtual register,
@@ -715,7 +706,7 @@
// VSETVLI here.
if (!CurInfo.isUnknown() && Require.hasAVLReg() &&
Require.getAVLReg().isVirtual() && !CurInfo.hasSEWLMULRatioOnly() &&
- CurInfo.hasCompatibleVTYPE(Require, /*Strict*/ false)) {
+ CurInfo.hasCompatibleVTYPE(Require)) {
if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) {
if (isVectorConfigInstr(*DefMI)) {
VSETVLIInfo DefInfo = getInfoForVSETVLI(*DefMI);
@@ -1046,8 +1037,7 @@
const BlockData &PBBInfo = BlockInfo[PBB->getNumber()];
// If the exit from the predecessor has the VTYPE we are looking for
// we might be able to avoid a VSETVLI.
- if (PBBInfo.Exit.isUnknown() ||
- !PBBInfo.Exit.hasCompatibleVTYPE(Require, /*Strict*/ false))
+ if (PBBInfo.Exit.isUnknown() || !PBBInfo.Exit.hasCompatibleVTYPE(Require))
return true;
// We need the PHI input to the be the output of a VSET(I)VLI.
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