[llvm] 601ed0b - [WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string

[Alex Bradbury via llvm-commits]

Author: Alex Bradbury
Date: 2022-05-17T11:02:30+01:00
New Revision: 601ed0b605310cc13d7ca7235c261dc95c2ced44

URL: https://github.com/llvm/llvm-project/commit/601ed0b605310cc13d7ca7235c261dc95c2ced44
DIFF: https://github.com/llvm/llvm-project/commit/601ed0b605310cc13d7ca7235c261dc95c2ced44.diff

LOG: [WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string

This is (IMHO) cleaner and (objectively) more strongly typed than using strings.

A follow-on patch will do the same for IsWasm64.

Differential Revision: https://reviews.llvm.org/D125713

Added: 
    

Modified: 
    llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
    llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
    llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
index 4dc0c9a46c387..27fbefddf7e54 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
@@ -14,10 +14,10 @@
 // WebAssembly Instruction Format.
 // We instantiate 2 of these for every actual instruction (register based
 // and stack based), see below.
-class WebAssemblyInst<bits<32> inst, string asmstr, string stack, string is64>
+class WebAssemblyInst<bits<32> inst, string asmstr, bit stack, string is64>
   : StackRel, RegisterRel, Wasm64Rel, Instruction {
   bits<32> Inst = inst; // Instruction encoding.
-  string StackBased = stack;
+  bit StackBased = stack;
   string BaseName = NAME;
   string IsWasm64 = is64;
   string Wasm32Name = !subst("_A64", "_A32", NAME);
@@ -30,7 +30,7 @@ class WebAssemblyInst<bits<32> inst, string asmstr, string stack, string is64>
 }
 
 // Normal instructions. Default instantiation of a WebAssemblyInst.
-class NI<dag oops, dag iops, list<dag> pattern, string stack,
+class NI<dag oops, dag iops, list<dag> pattern, bit stack,
          string asmstr = "", bits<32> inst = -1, string is64 = "false">
     : WebAssemblyInst<inst, asmstr, stack, is64> {
   dag OutOperandList = oops;
@@ -56,9 +56,9 @@ multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
              list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "",
              bits<32> inst = -1, string is64 = "false"> {
   let isCodeGenOnly = 1 in
-  def "" : NI<oops_r, iops_r, pattern_r, "false", asmstr_r, inst, is64>;
+  def "" : NI<oops_r, iops_r, pattern_r, false, asmstr_r, inst, is64>;
   let BaseName = NAME in
-  def _S : NI<oops_s, iops_s, [], "true", asmstr_s, inst, is64>;
+  def _S : NI<oops_s, iops_s, [], true, asmstr_s, inst, is64>;
 }
 
 // For instructions that have no register ops, so both sets are the same.

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
index d700fcbc1ff4e..7c46139c543dc 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
@@ -225,8 +225,8 @@ def getStackOpcode : InstrMapping {
   let FilterClass = "StackRel";
   let RowFields = ["BaseName"];
   let ColFields = ["StackBased"];
-  let KeyCol = ["false"];
-  let ValueCols = [["true"]];
+  let KeyCol = ["0"];
+  let ValueCols = [["1"]];
 }
 
 //===----------------------------------------------------------------------===//
@@ -238,8 +238,8 @@ def getRegisterOpcode : InstrMapping {
   let FilterClass = "RegisterRel";
   let RowFields = ["BaseName"];
   let ColFields = ["StackBased"];
-  let KeyCol = ["true"];
-  let ValueCols = [["false"]];
+  let KeyCol = ["1"];
+  let ValueCols = [["0"]];
 }
 
 //===----------------------------------------------------------------------===//

diff  --git a/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp b/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
index d03b1d2e9c9f5..dc037e4409ab7 100644
--- a/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
+++ b/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
@@ -55,11 +55,7 @@ void emitWebAssemblyDisassemblerTables(
     auto &CGIP = OpcodeTable[Prefix][Opc];
     // All wasm instructions have a StackBased field of type string, we only
     // want the instructions for which this is "true".
-    auto StackString =
-        Def.getValue("StackBased")->getValue()->getCastTo(StringRecTy::get(RK));
-    auto IsStackBased =
-        StackString &&
-        reinterpret_cast<const StringInit *>(StackString)->getValue() == "true";
+    bool IsStackBased = Def.getValueAsBit("StackBased");
     if (!IsStackBased)
       continue;
     if (CGIP.second) {