[llvm] f00f894 - [RISCV][NFC] Reword split SP adjustment comments

[Fraser Cormack via llvm-commits]

Author: Fraser Cormack
Date: 2022-05-17T10:03:21+01:00
New Revision: f00f894d5d828c3ea7757f62268eaa4cd9a28c88

URL: https://github.com/llvm/llvm-project/commit/f00f894d5d828c3ea7757f62268eaa4cd9a28c88
DIFF: https://github.com/llvm/llvm-project/commit/f00f894d5d828c3ea7757f62268eaa4cd9a28c88.diff

LOG: [RISCV][NFC] Reword split SP adjustment comments

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index fe642bab208b..797a3515f9d9 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1025,21 +1025,21 @@ RISCVFrameLowering::getFirstSPAdjustAmount(const MachineFunction &MF) const {
   const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
   uint64_t StackSize = MFI.getStackSize();
 
-  // Disable SplitSPAdjust if save-restore libcall used. The callee saved
+  // Disable SplitSPAdjust if save-restore libcall is used. The callee-saved
   // registers will be pushed by the save-restore libcalls, so we don't have to
   // split the SP adjustment in this case.
   if (RVFI->getLibCallStackSize())
     return 0;
 
-  // Return the FirstSPAdjustAmount if the StackSize can not fit in signed
-  // 12-bit and there exists a callee saved register need to be pushed.
+  // Return the FirstSPAdjustAmount if the StackSize can not fit in a signed
+  // 12-bit and there exists a callee-saved register needing to be pushed.
   if (!isInt<12>(StackSize) && (CSI.size() > 0)) {
-    // FirstSPAdjustAmount is chosen as (2048 - StackAlign)
-    // because 2048 will cause sp = sp + 2048 in epilogue split into
-    // multi-instructions. The offset smaller than 2048 can fit in single
-    // load/store instruction and we have to stick with the stack alignment.
-    // 2048 is 16-byte alignment. The stack alignment for RV32 and RV64 is 16,
-    // for RV32E is 4. So (2048 - StackAlign) will satisfy the stack alignment.
+    // FirstSPAdjustAmount is chosen as (2048 - StackAlign) because 2048 will
+    // cause sp = sp + 2048 in the epilogue to be split into multiple
+    // instructions. Offsets smaller than 2048 can fit in a single load/store
+    // instruction, and we have to stick with the stack alignment. 2048 has
+    // 16-byte alignment. The stack alignment for RV32 and RV64 is 16 and for
+    // RV32E it is 4. So (2048 - StackAlign) will satisfy the stack alignment.
     return 2048 - getStackAlign().value();
   }
   return 0;