[PATCH] D125700: [AMDGPU][GFX9] Support base+soffset+offset SMEM loads.

Mon May 16 14:00:25 PDT 2022

arsenm added inline comments.

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Comment at: llvm/test/MC/AMDGPU/gfx9_asm_smem.s:126

+s_load_dwordx2 s[10:11], s[2:3], s0 offset:0x12345
+// CHECK: [0x81,0x42,0x06,0xc0,0x45,0x23,0x01,0x00]
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An unaligned offset is suspicious looking but technically not wrong

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Comment at: llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt:10077

+# CHECK: s_load_dword s5, s[2:3], s0 offset:0x12345 ; encoding: [0x41,0x41,0x02,0xc0,0x45,0x23,0x01,0x00]
+0x41,0x41,0x02,0xc0,0x45,0x23,0x01,0x00
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rampitec wrote:
> Is there a decoding conflict which requires to use brackets here? Something from the TODO list?
I'm not sure what this question means. The encoding is always printed in brackets?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125700/new/

https://reviews.llvm.org/D125700