[llvm] 1ddc6ab - AArch64: support ISel for fence instructions

[Tim Northover via llvm-commits]

Author: Tim Northover
Date: 2022-05-16T12:01:18+01:00
New Revision: 1ddc6ab1a9c321e02da4fab836c5f863a906108b

URL: https://github.com/llvm/llvm-project/commit/1ddc6ab1a9c321e02da4fab836c5f863a906108b
DIFF: https://github.com/llvm/llvm-project/commit/1ddc6ab1a9c321e02da4fab836c5f863a906108b.diff

LOG: AArch64: support ISel for fence instructions

Only the most conservative of the DAG patterns matched, leaving GISel with "dmb
ish" everywhere which is inefficient.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
    llvm/test/CodeGen/AArch64/fence-singlethread.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 251cb3ff3115..156c3a8c06e9 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -2312,6 +2312,16 @@ bool AArch64InstructionSelector::earlySelect(MachineInstr &I) {
     I.eraseFromParent();
     return true;
   }
+  case TargetOpcode::G_FENCE: {
+    if (I.getOperand(1).getImm() == 0)
+      BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::CompilerBarrier))
+          .addImm(I.getOperand(0).getImm());
+    else
+      BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::DMB))
+          .addImm(I.getOperand(0).getImm() == 4 ? 0x9 : 0xb);
+    I.eraseFromParent();
+    return true;
+  }
   default:
     return false;
   }

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
index 4385e3ede36f..9979d9dc60f2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
@@ -629,17 +629,17 @@ define i64 @fetch_and_or_64(i64* %p) #0 {
 define void @acquire_fence() #0 {
 ; CHECK-NOLSE-LABEL: acquire_fence:
 ; CHECK-NOLSE:       ; %bb.0:
-; CHECK-NOLSE-NEXT:    dmb ish
+; CHECK-NOLSE-NEXT:    dmb ishld
 ; CHECK-NOLSE-NEXT:    ret
 ;
 ; CHECK-LSE-O1-LABEL: acquire_fence:
 ; CHECK-LSE-O1:       ; %bb.0:
-; CHECK-LSE-O1-NEXT:    dmb ish
+; CHECK-LSE-O1-NEXT:    dmb ishld
 ; CHECK-LSE-O1-NEXT:    ret
 ;
 ; CHECK-LSE-O0-LABEL: acquire_fence:
 ; CHECK-LSE-O0:       ; %bb.0:
-; CHECK-LSE-O0-NEXT:    dmb ish
+; CHECK-LSE-O0-NEXT:    dmb ishld
 ; CHECK-LSE-O0-NEXT:    ret
    fence acquire
    ret void

diff  --git a/llvm/test/CodeGen/AArch64/fence-singlethread.ll b/llvm/test/CodeGen/AArch64/fence-singlethread.ll
index 0af0e58a91d4..b8776062119c 100644
--- a/llvm/test/CodeGen/AArch64/fence-singlethread.ll
+++ b/llvm/test/CodeGen/AArch64/fence-singlethread.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=aarch64-linux-gnu %s -o - | FileCheck %s --check-prefix=LINUX
 ; RUN: llc -mtriple=aarch64-apple-ios %s -o - | FileCheck %s --check-prefix=IOS
+; RUN: llc -mtriple=aarch64-apple-ios %s -o - -global-isel | FileCheck %s --check-prefix=IOS
 ; RUN: llc -mtriple=aarch64-linux-gnueabihf %s -filetype=obj -o %t
 ; RUN: llvm-objdump -d %t | FileCheck %s --check-prefix=OBJ