[llvm] fd1f0c5 - [X86] lowerShuffleAsLanePermuteAndSHUFP always succeeds, so just return the result. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun May 15 07:53:47 PDT 2022
Author: Simon Pilgrim
Date: 2022-05-15T15:53:36+01:00
New Revision: fd1f0c51ef7f64ae7317a695ebb4f22fec3b8958
URL: https://github.com/llvm/llvm-project/commit/fd1f0c51ef7f64ae7317a695ebb4f22fec3b8958
DIFF: https://github.com/llvm/llvm-project/commit/fd1f0c51ef7f64ae7317a695ebb4f22fec3b8958.diff
LOG: [X86] lowerShuffleAsLanePermuteAndSHUFP always succeeds, so just return the result. NFC.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 646241a50fca..d7c416cc3dfd 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -16672,9 +16672,7 @@ static SDValue lowerShuffleAsLanePermuteAndShuffle(
// otherwise we're (probably) better off doing a split.
if (VT == MVT::v4f64 &&
!all_of(Mask, [LaneSize](int M) { return M < LaneSize; }))
- if (SDValue V =
- lowerShuffleAsLanePermuteAndSHUFP(DL, VT, V1, V2, Mask, DAG))
- return V;
+ return lowerShuffleAsLanePermuteAndSHUFP(DL, VT, V1, V2, Mask, DAG);
// If there are only inputs from one 128-bit lane, splitting will in fact be
// less expensive. The flags track whether the given lane contains an element
@@ -17602,9 +17600,7 @@ static SDValue lowerV4F64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
!all_of(Mask, [](int M) { return M < 2 || (4 <= M && M < 6); }) &&
(V1.getOpcode() != ISD::BUILD_VECTOR) &&
(V2.getOpcode() != ISD::BUILD_VECTOR))
- if (SDValue Op = lowerShuffleAsLanePermuteAndSHUFP(DL, MVT::v4f64, V1, V2,
- Mask, DAG))
- return Op;
+ return lowerShuffleAsLanePermuteAndSHUFP(DL, MVT::v4f64, V1, V2, Mask, DAG);
// If we have one input in place, then we can permute the other input and
// blend the result.
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