[llvm] 5a19fba - [RISCV] Remove unneeded check for ISD::VSCALE operand being a constant. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat May 14 14:28:58 PDT 2022
Author: Craig Topper
Date: 2022-05-14T13:45:03-07:00
New Revision: 5a19fbad83018b705923e13fee957c049c295bbf
URL: https://github.com/llvm/llvm-project/commit/5a19fbad83018b705923e13fee957c049c295bbf
DIFF: https://github.com/llvm/llvm-project/commit/5a19fbad83018b705923e13fee957c049c295bbf.diff
LOG: [RISCV] Remove unneeded check for ISD::VSCALE operand being a constant. NFC
ISD::VSCALE only allows constant operands.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 392594c27a91c..8894fc4e20262 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3097,26 +3097,24 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
static_assert(RISCV::RVVBitsPerBlock == 64, "Unexpected bits per block!");
if (Subtarget.getMinVLen() < RISCV::RVVBitsPerBlock)
report_fatal_error("Support for VLEN==32 is incomplete.");
- if (isa<ConstantSDNode>(Op.getOperand(0))) {
- // We assume VLENB is a multiple of 8. We manually choose the best shift
- // here because SimplifyDemandedBits isn't always able to simplify it.
- uint64_t Val = Op.getConstantOperandVal(0);
- if (isPowerOf2_64(Val)) {
- uint64_t Log2 = Log2_64(Val);
- if (Log2 < 3)
- return DAG.getNode(ISD::SRL, DL, VT, VLENB,
- DAG.getConstant(3 - Log2, DL, VT));
- if (Log2 > 3)
- return DAG.getNode(ISD::SHL, DL, VT, VLENB,
- DAG.getConstant(Log2 - 3, DL, VT));
- return VLENB;
- }
- // If the multiplier is a multiple of 8, scale it down to avoid needing
- // to shift the VLENB value.
- if ((Val % 8) == 0)
- return DAG.getNode(ISD::MUL, DL, VT, VLENB,
- DAG.getConstant(Val / 8, DL, VT));
- }
+ // We assume VLENB is a multiple of 8. We manually choose the best shift
+ // here because SimplifyDemandedBits isn't always able to simplify it.
+ uint64_t Val = Op.getConstantOperandVal(0);
+ if (isPowerOf2_64(Val)) {
+ uint64_t Log2 = Log2_64(Val);
+ if (Log2 < 3)
+ return DAG.getNode(ISD::SRL, DL, VT, VLENB,
+ DAG.getConstant(3 - Log2, DL, VT));
+ if (Log2 > 3)
+ return DAG.getNode(ISD::SHL, DL, VT, VLENB,
+ DAG.getConstant(Log2 - 3, DL, VT));
+ return VLENB;
+ }
+ // If the multiplier is a multiple of 8, scale it down to avoid needing
+ // to shift the VLENB value.
+ if ((Val % 8) == 0)
+ return DAG.getNode(ISD::MUL, DL, VT, VLENB,
+ DAG.getConstant(Val / 8, DL, VT));
SDValue VScale = DAG.getNode(ISD::SRL, DL, VT, VLENB,
DAG.getConstant(3, DL, VT));
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