[llvm] 92eea11 - [X86] Regenerate pull-binop-through-shift.ll showing stack address math
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat May 14 03:59:43 PDT 2022
Author: Simon Pilgrim
Date: 2022-05-14T11:59:22+01:00
New Revision: 92eea11cca0d904ff1506e989e5f2c30a9f68c05
URL: https://github.com/llvm/llvm-project/commit/92eea11cca0d904ff1506e989e5f2c30a9f68c05
DIFF: https://github.com/llvm/llvm-project/commit/92eea11cca0d904ff1506e989e5f2c30a9f68c05.diff
LOG: [X86] Regenerate pull-binop-through-shift.ll showing stack address math
Also rename X32 check prefixes to X86 as we try to use X32 for gnux32 targets
Added:
Modified:
llvm/test/CodeGen/X86/pull-binop-through-shift.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/pull-binop-through-shift.ll b/llvm/test/CodeGen/X86/pull-binop-through-shift.ll
index 180b609a0de3..9c2549c98104 100644
--- a/llvm/test/CodeGen/X86/pull-binop-through-shift.ll
+++ b/llvm/test/CodeGen/X86/pull-binop-through-shift.ll
@@ -1,6 +1,6 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; shift left
@@ -13,13 +13,13 @@ define i32 @and_signbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: and_signbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $24, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: and_signbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movzbl 6(%esp), %eax
+; X86-NEXT: shll $24, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = and i32 %x, 4294901760 ; 0xFFFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -34,13 +34,13 @@ define i32 @and_nosignbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: and_nosignbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $24, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: and_nosignbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movzbl 6(%esp), %eax
+; X86-NEXT: shll $24, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = and i32 %x, 2147418112 ; 0x7FFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -56,14 +56,14 @@ define i32 @or_signbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: or_signbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: orl $-16777216, %eax # imm = 0xFF000000
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: or_signbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: orl $-16777216, %eax # imm = 0xFF000000
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = or i32 %x, 4294901760 ; 0xFFFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -78,14 +78,14 @@ define i32 @or_nosignbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: or_nosignbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: orl $-16777216, %eax # imm = 0xFF000000
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: or_nosignbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: orl $-16777216, %eax # imm = 0xFF000000
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = or i32 %x, 2147418112 ; 0x7FFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -101,14 +101,14 @@ define i32 @xor_signbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: xor_signbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $16711680, %eax # imm = 0xFF0000
-; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: xor_signbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $16711680, %eax # imm = 0xFF0000
+; X86-NEXT: xorl 4(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -123,14 +123,14 @@ define i32 @xor_nosignbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: xor_nosignbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $16711680, %eax # imm = 0xFF0000
-; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: xor_nosignbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $16711680, %eax # imm = 0xFF0000
+; X86-NEXT: xorl 4(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -146,14 +146,14 @@ define i32 @add_signbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: add_signbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: addl $-16777216, %eax # imm = 0xFF000000
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: add_signbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: addl $-16777216, %eax # imm = 0xFF000000
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = add i32 %x, 4294901760 ; 0xFFFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -168,14 +168,14 @@ define i32 @add_nosignbit_shl(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: add_nosignbit_shl:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: addl $-16777216, %eax # imm = 0xFF000000
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: add_nosignbit_shl:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: addl $-16777216, %eax # imm = 0xFF000000
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = add i32 %x, 2147418112 ; 0x7FFF0000
%r = shl i32 %t0, 8
store i32 %r, i32* %dst
@@ -193,14 +193,14 @@ define i32 @and_signbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: and_signbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $16, %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: and_signbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movzwl 6(%esp), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = and i32 %x, 4294901760 ; 0xFFFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -215,14 +215,14 @@ define i32 @and_nosignbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: and_nosignbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: and_nosignbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: andl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = and i32 %x, 2147418112 ; 0x7FFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -238,14 +238,14 @@ define i32 @or_signbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: or_signbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: or_signbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
+; X86-NEXT: orl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = or i32 %x, 4294901760 ; 0xFFFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -260,14 +260,14 @@ define i32 @or_nosignbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: or_nosignbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: or_nosignbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: orl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = or i32 %x, 2147418112 ; 0x7FFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -283,14 +283,14 @@ define i32 @xor_signbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: xor_signbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: xor_signbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
+; X86-NEXT: xorl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -305,14 +305,14 @@ define i32 @xor_nosignbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: xor_nosignbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: xor_nosignbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: xorl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -328,14 +328,14 @@ define i32 @add_signbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: add_signbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: add_signbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
+; X86-NEXT: addl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = add i32 %x, 4294901760 ; 0xFFFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -350,14 +350,14 @@ define i32 @add_nosignbit_lshr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: add_nosignbit_lshr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: add_nosignbit_lshr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: addl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = add i32 %x, 2147418112 ; 0x7FFF0000
%r = lshr i32 %t0, 8
store i32 %r, i32* %dst
@@ -375,13 +375,13 @@ define i32 @and_signbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: and_signbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shll $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: and_signbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movswl 6(%esp), %eax
+; X86-NEXT: shll $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = and i32 %x, 4294901760 ; 0xFFFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -396,14 +396,14 @@ define i32 @and_nosignbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: and_nosignbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: and_nosignbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: andl 4(%esp), %eax
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = and i32 %x, 2147418112 ; 0x7FFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -419,14 +419,14 @@ define i32 @or_signbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: or_signbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: or_signbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
+; X86-NEXT: orl 4(%esp), %eax
+; X86-NEXT: sarl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = or i32 %x, 4294901760 ; 0xFFFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -441,14 +441,14 @@ define i32 @or_nosignbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: or_nosignbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: or_nosignbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: orl 4(%esp), %eax
+; X86-NEXT: sarl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = or i32 %x, 2147418112 ; 0x7FFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -464,14 +464,14 @@ define i32 @xor_signbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: xor_signbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: xor_signbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
+; X86-NEXT: xorl 4(%esp), %eax
+; X86-NEXT: sarl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = xor i32 %x, 4294901760 ; 0xFFFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -486,14 +486,14 @@ define i32 @xor_nosignbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: xor_nosignbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: xor_nosignbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: xorl 4(%esp), %eax
+; X86-NEXT: sarl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = xor i32 %x, 2147418112 ; 0x7FFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -509,14 +509,14 @@ define i32 @add_signbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: add_signbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
-; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: add_signbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $-65536, %eax # imm = 0xFFFF0000
+; X86-NEXT: addl 4(%esp), %eax
+; X86-NEXT: sarl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = add i32 %x, 4294901760 ; 0xFFFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
@@ -531,14 +531,14 @@ define i32 @add_nosignbit_ashr(i32 %x, i32* %dst) {
; X64-NEXT: movl %eax, (%rsi)
; X64-NEXT: retq
;
-; X32-LABEL: add_nosignbit_ashr:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
-; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: sarl $8, %eax
-; X32-NEXT: movl %eax, (%ecx)
-; X32-NEXT: retl
+; X86-LABEL: add_nosignbit_ashr:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl $2147418112, %eax # imm = 0x7FFF0000
+; X86-NEXT: addl 4(%esp), %eax
+; X86-NEXT: sarl $8, %eax
+; X86-NEXT: movl %eax, (%ecx)
+; X86-NEXT: retl
%t0 = add i32 %x, 2147418112 ; 0x7FFF0000
%r = ashr i32 %t0, 8
store i32 %r, i32* %dst
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