[PATCH] D125601: [DAGCombiner][AArch64] Reorder the bitcast of scalable vector

Allen zhong via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat May 14 02:12:02 PDT 2022


Allen created this revision.
Allen added reviewers: craig.topper, paulwalker-arm, RKSimon, dmgreen, david-arm.
Herald added subscribers: StephenFan, ecnelises, hiraditya, kristof.beyls.
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Allen requested review of this revision.
Herald added subscribers: llvm-commits, alextsao1999.
Herald added a project: LLVM.

Perform the following reorder when the scalable vector's inner type is floating
point and the outer type is not scalable vector, eg:
t19: v2f32 = extract_subvector t2, Constant:i64<0>

  t12: v2i32 = bitcast t19

>
-

t20: nxv2i32 = bitcast t2

  t21: v2i32 = extract_subvector t20, Constant:i64<0>


https://reviews.llvm.org/D125601

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/extract-insert-element-sve.ll

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