[PATCH] D125534: [AArch64][SME][NFC] Add implicit operands for SME instructions in the disassembly.

[Caroline via Phabricator via llvm-commits]

CarolineConcatto created this revision.
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This patch simplifies the switch statement in getInstruction to add
implicit operands (register ZA and Immediate  equal to zero)
in the SME operands when disassembly.

The register ZA and the zero immediate  can be added by checking the operand
in MCInstDesc.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D125534

Files:
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.h
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h

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