[PATCH] D124564: [MachineCombiner, AArch64] Add a new pattern A-(B+C) => (A-B)-C to reduce latency

[Guozhi Wei via Phabricator via llvm-commits]

Carrot added a comment.

In D124564#3508295 <https://reviews.llvm.org/D124564#3508295>, @dmgreen wrote:

> Hello. This looks like two different patches.

I did the MachineCombiner cost model improvement because it impacts my aarch64 test cases. But as you said it's reasonable to sent it as a separate patch. I will do that.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D124564/new/

https://reviews.llvm.org/D124564