[PATCH] D125462: [llvm-readobj] [COFF] Fix the printout for ARM64 packed homed parameters

[Martin Storsjö via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0187bb28db73: [llvm-readobj] [COFF] Fix the printout for ARM64 packed homed parameters (authored by mstorsjo).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125462/new/

https://reviews.llvm.org/D125462

Files:
  llvm/test/MC/AArch64/seh-packed-unwind.s
  llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s
  llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp


Index: llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
===================================================================
--- llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
+++ llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
@@ -1189,11 +1189,11 @@
     SW.startLine() << format("sub sp, sp, #%d\n", LocSZ);
   }
   if (RF.H()) {
-    SW.startLine() << format("stp x6, x7, [sp, #%d]\n", IntSZ + FpSZ + 48);
-    SW.startLine() << format("stp x4, x5, [sp, #%d]\n", IntSZ + FpSZ + 32);
-    SW.startLine() << format("stp x2, x3, [sp, #%d]\n", IntSZ + FpSZ + 16);
+    SW.startLine() << format("stp x6, x7, [sp, #%d]\n", SavSZ - 16);
+    SW.startLine() << format("stp x4, x5, [sp, #%d]\n", SavSZ - 32);
+    SW.startLine() << format("stp x2, x3, [sp, #%d]\n", SavSZ - 48);
     if (RF.RegI() > 0 || RF.RegF() > 0 || RF.CR() == 1) {
-      SW.startLine() << format("stp x0, x1, [sp, #%d]\n", IntSZ + FpSZ);
+      SW.startLine() << format("stp x0, x1, [sp, #%d]\n", SavSZ - 64);
     } else {
       // This case isn't documented; if neither RegI nor RegF nor CR=1
       // have decremented the stack pointer by SavSZ, we need to do it here
Index: llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s
===================================================================
--- llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s
+++ llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s
@@ -87,10 +87,10 @@
 // CHECK-NEXT:     FrameSize: 112
 // CHECK-NEXT:     Prologue [
 // CHECK-NEXT:       sub sp, sp, #32
-// CHECK-NEXT:       stp x6, x7, [sp, #56]
-// CHECK-NEXT:       stp x4, x5, [sp, #40]
-// CHECK-NEXT:       stp x2, x3, [sp, #24]
-// CHECK-NEXT:       stp x0, x1, [sp, #8]
+// CHECK-NEXT:       stp x6, x7, [sp, #64]
+// CHECK-NEXT:       stp x4, x5, [sp, #48]
+// CHECK-NEXT:       stp x2, x3, [sp, #32]
+// CHECK-NEXT:       stp x0, x1, [sp, #16]
 // CHECK-NEXT:       str x19, [sp, #-80]!
 // CHECK-NEXT:       end
 // CHECK-NEXT:     ]
@@ -267,10 +267,10 @@
 // CHECK-NEXT:     FrameSize: 112
 // CHECK-NEXT:     Prologue [
 // CHECK-NEXT:       sub sp, sp, #32
-// CHECK-NEXT:       stp x6, x7, [sp, #56]
-// CHECK-NEXT:       stp x4, x5, [sp, #40]
-// CHECK-NEXT:       stp x2, x3, [sp, #24]
-// CHECK-NEXT:       stp x0, x1, [sp, #8]
+// CHECK-NEXT:       stp x6, x7, [sp, #64]
+// CHECK-NEXT:       stp x4, x5, [sp, #48]
+// CHECK-NEXT:       stp x2, x3, [sp, #32]
+// CHECK-NEXT:       stp x0, x1, [sp, #16]
 // CHECK-NEXT:       str lr, [sp, #-80]!
 // CHECK-NEXT:       end
 // CHECK-NEXT:     ]
Index: llvm/test/MC/AArch64/seh-packed-unwind.s
===================================================================
--- llvm/test/MC/AArch64/seh-packed-unwind.s
+++ llvm/test/MC/AArch64/seh-packed-unwind.s
@@ -91,10 +91,10 @@
 // CHECK-NEXT:     FrameSize: 112
 // CHECK-NEXT:     Prologue [
 // CHECK-NEXT:       sub sp, sp, #32
-// CHECK-NEXT:       stp x6, x7, [sp, #56]
-// CHECK-NEXT:       stp x4, x5, [sp, #40]
-// CHECK-NEXT:       stp x2, x3, [sp, #24]
-// CHECK-NEXT:       stp x0, x1, [sp, #8]
+// CHECK-NEXT:       stp x6, x7, [sp, #64]
+// CHECK-NEXT:       stp x4, x5, [sp, #48]
+// CHECK-NEXT:       stp x2, x3, [sp, #32]
+// CHECK-NEXT:       stp x0, x1, [sp, #16]
 // CHECK-NEXT:       str x19, [sp, #-80]!
 // CHECK-NEXT:       end
 // CHECK-NEXT:     ]
@@ -445,13 +445,13 @@
     .seh_proc func5
     str x19, [sp, #-80]!
     .seh_save_reg_x x19, 80
-    stp x0,  x1,  [sp, #8]
+    stp x0,  x1,  [sp, #16]
     .seh_nop
-    stp x2,  x3,  [sp, #24]
+    stp x2,  x3,  [sp, #32]
     .seh_nop
-    stp x4,  x5,  [sp, #40]
+    stp x4,  x5,  [sp, #48]
     .seh_nop
-    stp x6,  x7,  [sp, #56]
+    stp x6,  x7,  [sp, #64]
     .seh_nop
     sub sp,  sp,  #32
     .seh_stackalloc 32


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