[PATCH] D125477: [AArch64] Teach perfect shuffles tables about D-lane movs

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 12 10:28:25 PDT 2022


dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, jaykang10, labrinea, samtebbs.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a project: LLVM.

Similar to D123386 <https://reviews.llvm.org/D123386>, this adds D-Movs to the AArch64 perfect shuffle tables, slightly lowering the costs a little more. This is a rough improvement in general, especially if you ignore `mov v0.16b, v2.16b` type moves that are often artefacts of the calling convention.

The D register movs are encoded as (0x4 | LaneIdx), and to generate a D register move we are required to bitcast into a higher type, but it is otherwise very similar to the S-lane mov's already supported.


https://reviews.llvm.org/D125477

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
  llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
  llvm/test/CodeGen/AArch64/arm64-dup.ll
  llvm/test/CodeGen/AArch64/reduce-shuffle.ll
  llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
  llvm/test/CodeGen/AArch64/shuffles.ll
  llvm/test/Transforms/VectorCombine/AArch64/vecreduce-shuffle.ll
  llvm/utils/PerfectShuffle/PerfectShuffle.cpp

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