[PATCH] D125470: [AArch64] Predicate SSHLL;SCVTF patterns behind UseAlternateSExtLoadCVTF32

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, jaykang10, samtebbs, t.p.northover.
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There have been some patterns in the AArch64 backend to optimize code of the form:

  ldrsh w8, [x0]
  scvtf s0, w8

to:

  ldr h0, [x0]      
  sshll v0.4s, v0.4h, #0
  scvtf s0, s0          

The idea is to remove the GRP->FPR move, but in reality is making code larger and slower (or the same) on all the cpus I tried.

This patch adds the UseAlternateSExtLoadCVTF32 predicate similar to nearby related pattern.


https://reviews.llvm.org/D125470

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/arm64-scvt.ll

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