[PATCH] D125408: [riscv] Extend dataflow workaround from D119518 to fallthrough blocks
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 11 12:07:47 PDT 2022
reames created this revision.
reames added reviewers: frasercrmck, craig.topper.
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We've got a lurking problem with our data flow implementation where different phases disagree, resulting in possible workarounds. D119518 <https://reviews.llvm.org/D119518> extended a workaround, but failed to consider blocks without terminators (e.g. fallthroughs).
I have a deeper rework of the algorithm in flight over in D125232 <https://reviews.llvm.org/D125232>, but this patch is specifically a minimal fix for an active miscompile. That change can be reworked over this once landed.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D125408
Files:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
Index: llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
+++ llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
@@ -674,12 +674,10 @@
; CHECK-NEXT: [[PseudoVADD_VX_M1_:%[0-9]+]]:vr = PseudoVADD_VX_M1 [[PseudoVID_V_M1_]], [[PHI]], -1, 6 /* e64 */, implicit $vl, implicit $vtype
; CHECK-NEXT: [[MUL:%[0-9]+]]:gpr = MUL [[PHI]], [[SRLI]]
; CHECK-NEXT: [[ADD:%[0-9]+]]:gpr = ADD [[COPY]], [[MUL]]
- ; FIXME: We insert a SEW=32,LMUL=1/2 VSETVLI here but no SEW=64,LMUL=1
- ; VSETVLI before the VADD above. This misconfigures the VADD in the case that
- ; the loop takes its backedge.
; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0 killed $x0, 87 /* e32, mf2, ta, mu */, implicit-def $vl, implicit-def $vtype, implicit $vl
; CHECK-NEXT: PseudoVSE32_V_MF2 killed [[PseudoVADD_VX_M1_]], killed [[ADD]], -1, 5 /* e32 */, implicit $vl, implicit $vtype
; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[PHI]], 1
+ ; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0 killed $x0, 88 /* e64, m1, ta, mu */, implicit-def $vl, implicit-def $vtype, implicit $vl
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000)
Index: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1176,16 +1176,19 @@
CurInfo = VSETVLIInfo::getUnknown();
PrevVSETVLIMI = nullptr;
}
+ }
- // If we reach the end of the block and our current info doesn't match the
- // expected info, insert a vsetvli to correct.
- if (!UseStrictAsserts && MI.isTerminator()) {
- const VSETVLIInfo &ExitInfo = BlockInfo[MBB.getNumber()].Exit;
- if (CurInfo.isValid() && ExitInfo.isValid() && !ExitInfo.isUnknown() &&
- CurInfo != ExitInfo) {
- insertVSETVLI(MBB, MI, ExitInfo, CurInfo);
- CurInfo = ExitInfo;
- }
+ // If we reach the end of the block and our current info doesn't match the
+ // expected info, insert a vsetvli to correct.
+ if (!UseStrictAsserts) {
+ const VSETVLIInfo &ExitInfo = BlockInfo[MBB.getNumber()].Exit;
+ if (CurInfo.isValid() && ExitInfo.isValid() && !ExitInfo.isUnknown() &&
+ CurInfo != ExitInfo) {
+ // Note there's an implicit assumption here that terminators never use
+ // or modify VL or VTYPE. Also, fallthrough will return end().
+ auto InsertPt = MBB.getFirstTerminator().getInstrIterator();
+ insertVSETVLI(MBB, InsertPt, MBB.findDebugLoc(InsertPt), ExitInfo, CurInfo);
+ CurInfo = ExitInfo;
}
}
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