[PATCH] D125233: [AArch64][SVE] Convert SRSHL to LSL when the fed from an ABS intrinsic

Bradley Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 11 08:00:28 PDT 2022


bsmith added a comment.

In D125233#3503702 <https://reviews.llvm.org/D125233#3503702>, @david-arm wrote:

> Hi @bsmith, this looks like a sensible optimisation! I suppose we can also do something similar when the input is an `and` too? i.e.
>
>   %mask = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 0x7FFF)
>   %and = tail call <vscale x 8 x i16> @llvm.aarch64.sve.and.nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a, <vscale x 8 x i16> %mask)
>   %splat = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 2)
>   %shr = tail call <vscale x 8 x i16> @llvm.aarch64.sve.srshl.nxv8i16(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %and, <vscale x 8 x i16> %splat)

I think it's probably not worth handling a case like this, the abs case is one we have explicitly seen in real world code. We could in theory go further and add even more cases (shr also, for example), but given there is no obvious generic way to do this we'd have to add loads of special cases for each intrinsic we might care about, all just in case someone happened to write/end up with suboptimal ACLE code, (srshl is not a compiler generated thing, it will only come from ACLE intrinsics). I think it's probably best to only extend this if and when we need it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125233/new/

https://reviews.llvm.org/D125233



More information about the llvm-commits mailing list