[PATCH] D125345: [X86] Fix 80 column violation in X86InstrInfo.cpp. NFC

[Mingming Liu via Phabricator via llvm-commits]

mingmingl updated this revision to Diff 428533.
mingmingl added a comment.

Fix a typo


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D125345/new/

https://reviews.llvm.org/D125345

Files:
  llvm/lib/Target/X86/X86InstrInfo.cpp


Index: llvm/lib/Target/X86/X86InstrInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86InstrInfo.cpp
+++ llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -1049,11 +1049,12 @@
     // in the `AND` and `TEST` operation; signed bit is not known for `AND`,
     // and is known to be 0 as a result of `TEST64rr`.
     //
-    // FIXME: As opposed to poisoning the SF bit direclty, consider peeking into
-    // the AND instruction and using the static information to guide peephole optimization if possible.
-    // For example, it's possible to fold a conditional move into a copy
-    // if the relevant EFLAG bits could be deduced from an immediate operand of and operation.
-    // 
+    // FIXME: As opposed to poisoning the SF bit directly, consider peeking into
+    // the AND instruction and using the static information to guide peephole
+    // optimization if possible. For example, it's possible to fold a
+    // conditional move into a copy if the relevant EFLAG bits could be deduced
+    // from an immediate operand of and operation.
+    //
     NoSignFlag = true;
     // ClearsOverflowFlag is true for AND operation (no surprise).
     ClearsOverflowFlag = true;


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