[PATCH] D124109: [RISCV] Add a DAG combine to pre-promote (i32 (and (srl X, Y), 1)) with Zbs on RV64.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 10 10:08:07 PDT 2022

Previous message: [PATCH] D124894: Avoid 8 and 16bit switch conditions on x86
Next message: [PATCH] D124109: [RISCV] Add a DAG combine to pre-promote (i32 (and (srl X, Y), 1)) with Zbs on RV64.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

craig.topper added a comment.
Herald added a subscriber: shiva0217.

Ping


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124109/new/

https://reviews.llvm.org/D124109

Previous message: [PATCH] D124894: Avoid 8 and 16bit switch conditions on x86
Next message: [PATCH] D124109: [RISCV] Add a DAG combine to pre-promote (i32 (and (srl X, Y), 1)) with Zbs on RV64.
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list