[llvm] 7fe0630 - [RISCV] 'K'-extension ordering

[Kito Cheng via llvm-commits]

Author: Tsukasa OI
Date: 2022-05-11T00:52:00+08:00
New Revision: 7fe0630fcb6d52cb63463669c47f4846f7d9ccbf

URL: https://github.com/llvm/llvm-project/commit/7fe0630fcb6d52cb63463669c47f4846f7d9ccbf
DIFF: https://github.com/llvm/llvm-project/commit/7fe0630fcb6d52cb63463669c47f4846f7d9ccbf.diff

LOG: [RISCV] 'K'-extension ordering

This commit adds 'K' to supported extension list (before 'J').
It makes "Zk*" extensions correctly placed before "Zv*" extensions.

Multi-letter "Z*" extensions are first ordered with the most closely
related alphabetical extension category ("IMAF...").  This is represented
in LLVM as `AllStdExts' variable in `llvm/lib/Support/RISCVISAInfo.cpp'.

However, it did not have 'k' making "Zk*" extensions not correctly ordered.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D124340

Added: 
    

Modified: 
    llvm/lib/Support/RISCVISAInfo.cpp
    llvm/test/MC/RISCV/attribute-arch.s

Removed: 
    


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diff  --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp
index 20dd08f17311a..96b2cd9875d34 100644
--- a/llvm/lib/Support/RISCVISAInfo.cpp
+++ b/llvm/lib/Support/RISCVISAInfo.cpp
@@ -37,7 +37,7 @@ struct RISCVSupportedExtension {
 
 } // end anonymous namespace
 
-static constexpr StringLiteral AllStdExts = "mafdqlcbjtpvn";
+static constexpr StringLiteral AllStdExts = "mafdqlcbkjtpvn";
 
 static const RISCVSupportedExtension SupportedExtensions[] = {
     {"i", RISCVExtensionVersion{2, 0}},

diff  --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 88f155201195b..2bd315daa9629 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -175,3 +175,6 @@
 
 .attribute arch, "rv32i_zk1p0"
 # CHECK: attribute      5, "rv32i2p0_zbkb1p0_zbkc1p0_zbkx1p0_zk1p0_zkn1p0_zknd1p0_zkne1p0_zknh1p0_zkr1p0_zkt1p0"
+
+.attribute arch, "rv32if_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0"
+# CHECK: attribute      5, "rv32i2p0_f2p0_zkt1p0_zve32f1p0_zve32x1p0_zvl32b1p0"