[PATCH] D124723: [MIPS} Address ISel failures for 64 bit fpus in microMIPS

Simon Atanasyan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 10 09:23:14 PDT 2022


atanasyan accepted this revision.
atanasyan added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/test/CodeGen/Mips/llvm-ir/store.ll:27
 ; MIPS32:       # %bb.0:
-; MIPS32-NEXT:    lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi
-; MIPS32-NEXT:    # <MCOperand Reg:{{[0-9]+}}>
+; MIPS32-NEXT:    lui $1, %hi(a) # <MCInst #{{.*}} LUi
+; MIPS32-NEXT:    # <MCOperand Reg:{{.*}}>
----------------
sdardis wrote:
> atanasyan wrote:
> > Are changes like this unrelated to the fix?
> These are somewhat unrelated but do simply the regexes a bit. I can undo regex style change if youe feel it's necessary.
I think about splitting these changes into the two commits. But it's up to you.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124723/new/

https://reviews.llvm.org/D124723



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