[llvm] 38bb465 - GlobalISel: Trivial documentation and comment fixes
Nicolai Hähnle via llvm-commits
llvm-commits at lists.llvm.org
Tue May 10 05:49:12 PDT 2022
Author: Nicolai Hähnle
Date: 2022-05-10T07:48:56-05:00
New Revision: 38bb46523f87c9841db47b3518ffb232d9a6a06d
URL: https://github.com/llvm/llvm-project/commit/38bb46523f87c9841db47b3518ffb232d9a6a06d
DIFF: https://github.com/llvm/llvm-project/commit/38bb46523f87c9841db47b3518ffb232d9a6a06d.diff
LOG: GlobalISel: Trivial documentation and comment fixes
Differential Revision: https://reviews.llvm.org/D124808
Added:
Modified:
llvm/docs/GlobalISel/GenericOpcode.rst
llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
Removed:
################################################################################
diff --git a/llvm/docs/GlobalISel/GenericOpcode.rst b/llvm/docs/GlobalISel/GenericOpcode.rst
index 4b35066e3c0e8..a1dac644c031c 100644
--- a/llvm/docs/GlobalISel/GenericOpcode.rst
+++ b/llvm/docs/GlobalISel/GenericOpcode.rst
@@ -405,8 +405,8 @@ normal input. Also produce a carry output in addition to the normal result.
G_UMULH, G_SMULH
^^^^^^^^^^^^^^^^
-Multiply two numbers at twice the incoming bit width (signed) and return
-the high half of the result.
+Multiply two numbers at twice the incoming bit width (unsigned or signed) and
+return the high half of the result.
.. code-block:: none
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index b8a0980ef1bd5..e596bb6996cc5 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -1449,8 +1449,8 @@ class MachineIRBuilder {
/// Build and insert \p Res = G_SUB \p Op0, \p Op1
///
- /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
- /// truncated to their width.
+ /// G_SUB sets \p Res to the
diff erence of integer parameters \p Op0 and
+ /// \p Op1, truncated to their width.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
@@ -1466,7 +1466,7 @@ class MachineIRBuilder {
/// Build and insert \p Res = G_MUL \p Op0, \p Op1
///
- /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
+ /// G_MUL sets \p Res to the product of integer parameters \p Op0 and \p Op1,
/// truncated to their width.
///
/// \pre setBasicBlock or setMI must have been called.
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