[llvm] 0b2e7a7 - [RISCV][NFC] Remove else after continue
Fraser Cormack via llvm-commits
llvm-commits at lists.llvm.org
Tue May 10 03:28:22 PDT 2022
Author: Fraser Cormack
Date: 2022-05-10T11:15:50+01:00
New Revision: 0b2e7a7c72c71b1cd5d39980a296b104013ec4ea
URL: https://github.com/llvm/llvm-project/commit/0b2e7a7c72c71b1cd5d39980a296b104013ec4ea
DIFF: https://github.com/llvm/llvm-project/commit/0b2e7a7c72c71b1cd5d39980a296b104013ec4ea.diff
LOG: [RISCV][NFC] Remove else after continue
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 2a999568bac0f..75b6aa692cfa2 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -9558,7 +9558,7 @@ static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI,
SequenceMBBI != E; ++SequenceMBBI) {
if (SequenceMBBI->isDebugInstr())
continue;
- else if (isSelectPseudo(*SequenceMBBI)) {
+ if (isSelectPseudo(*SequenceMBBI)) {
if (SequenceMBBI->getOperand(1).getReg() != LHS ||
SequenceMBBI->getOperand(2).getReg() != RHS ||
SequenceMBBI->getOperand(3).getImm() != CC ||
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