[PATCH] D125199: [RISCV] Make PseudoReadVL have the vtypes of the corresponding VLEFF/VLSEGFF.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 9 20:16:34 PDT 2022
fakepaper56 marked 2 inline comments as done.
fakepaper56 added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/vleff-rv32-readvl.ll:45
+ ; CHECK-NEXT: [[PseudoVLE8FF_V_M1_:%[0-9]+]]:vr = PseudoVLE8FF_V_M1 [[COPY1]], [[COPY]], 3 /* e8 */, implicit-def $vl
+ ; CHECK-NEXT: [[PseudoReadVL:%[0-9]+]]:gpr = PseudoReadVL 64, implicit $vl
+ ; CHECK-NEXT: $x10 = COPY [[PseudoReadVL]]
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kito-cheng wrote:
> craig.topper wrote:
> > Can you support this in RISCVInstrInfo::createMIROperandComment so that we add a comment to show 64 as a human readable vsetvli vtype operand?
> See also: https://reviews.llvm.org/D124187
Thank you. I thank decoding vtype by human brain is too hard. But I don't remember the comments of Vtype in vsetvli :(.
Repository:
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125199/new/
https://reviews.llvm.org/D125199
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