[PATCH] D124284: [SLP]Try partial store vectorization if supported by target.
Alexey Bataev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 9 09:03:05 PDT 2022
ABataev added inline comments.
================
Comment at: llvm/test/Transforms/SLPVectorizer/X86/arith-mul-load.ll:14
define void @add4(ptr noalias nocapture noundef %r, ptr noalias nocapture noundef readonly %a) {
; SSE-LABEL: @add4(
----------------
RKSimon wrote:
> I'll investigate adding 32-bit vector load/store handling as well (it has the same costs as the codegen for 64-bit anyhow).
TTI does not report that it supports 32 bit stores.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D124284/new/
https://reviews.llvm.org/D124284
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