[llvm] 01188f9 - [X86] insertps-combine.ll - show address math in checks

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-05-09T16:01:42+01:00
New Revision: 01188f996d2e65c9f1d0849cf834acebb32065ea

URL: https://github.com/llvm/llvm-project/commit/01188f996d2e65c9f1d0849cf834acebb32065ea
DIFF: https://github.com/llvm/llvm-project/commit/01188f996d2e65c9f1d0849cf834acebb32065ea.diff

LOG: [X86] insertps-combine.ll - show address math in checks

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/insertps-combine.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/insertps-combine.ll b/llvm/test/CodeGen/X86/insertps-combine.ll
index 195fabae23d8..71ab0237dc06 100644
--- a/llvm/test/CodeGen/X86/insertps-combine.ll
+++ b/llvm/test/CodeGen/X86/insertps-combine.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
@@ -234,12 +234,12 @@ define <4 x float> @insertps_zero_from_v8i16(<4 x float> %a0, <8 x i16>* %a1) no
 define <4 x float> @consecutive_load_insertps_04zz(float* %p) {
 ; SSE-LABEL: consecutive_load_insertps_04zz:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; SSE-NEXT:    movsd 4(%rdi), %xmm0 # xmm0 = mem[0],zero
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: consecutive_load_insertps_04zz:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
+; AVX-NEXT:    vmovsd 4(%rdi), %xmm0 # xmm0 = mem[0],zero
 ; AVX-NEXT:    retq
   %p0 = getelementptr inbounds float, float* %p, i64 1
   %p1 = getelementptr inbounds float, float* %p, i64 2
@@ -269,12 +269,12 @@ define float @extract_zero_insertps_z0z7(<4 x float> %a0, <4 x float> %a1) {
 define float @extract_lane_insertps_5123(<4 x float> %a0, <4 x float> *%p1) {
 ; SSE-LABEL: extract_lane_insertps_5123:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    movshdup {{.*#+}} xmm0 = mem[1,1,3,3]
+; SSE-NEXT:    movshdup (%rdi), %xmm0 # xmm0 = mem[1,1,3,3]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: extract_lane_insertps_5123:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vmovshdup {{.*#+}} xmm0 = mem[1,1,3,3]
+; AVX-NEXT:    vmovshdup (%rdi), %xmm0 # xmm0 = mem[1,1,3,3]
 ; AVX-NEXT:    retq
   %a1 = load <4 x float>, <4 x float> *%p1
   %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 64)
@@ -291,7 +291,7 @@ define float @extract_lane_insertps_6123(<4 x float> %a0, <4 x float> *%p1) {
 ;
 ; AVX-LABEL: extract_lane_insertps_6123:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpermilpd {{.*#+}} xmm0 = mem[1,0]
+; AVX-NEXT:    vpermilpd $1, (%rdi), %xmm0 # xmm0 = mem[1,0]
 ; AVX-NEXT:    retq
   %a1 = load <4 x float>, <4 x float> *%p1
   %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 128)
@@ -303,12 +303,12 @@ define float @extract_lane_insertps_6123(<4 x float> %a0, <4 x float> *%p1) {
 define <4 x float> @commute_load_insertps(<4 x float>, <4 x float>* nocapture readonly) {
 ; SSE-LABEL: commute_load_insertps:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    insertps {{.*#+}} xmm0 = zero,xmm0[1],zero,mem[0]
+; SSE-NEXT:    insertps $53, 12(%rdi), %xmm0 # xmm0 = zero,xmm0[1],zero,mem[0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: commute_load_insertps:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vinsertps {{.*#+}} xmm0 = zero,xmm0[1],zero,mem[0]
+; AVX-NEXT:    vinsertps $53, 12(%rdi), %xmm0, %xmm0 # xmm0 = zero,xmm0[1],zero,mem[0]
 ; AVX-NEXT:    retq
   %3 = load <4 x float>, <4 x float>* %1
   %4 = tail call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %3, <4 x float> %0, i8 85)