[PATCH] D125206: [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation

[WangLian via Phabricator via llvm-commits]

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Support VECREDUCE_ADD mask operation, turn it to VECREDUCE_XOR in getNode


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D125206

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll

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