[PATCH] D122918: [RISCV][CodeGen] Support float-arith in Zfinx

[Shao-Ce SUN via Phabricator via llvm-commits]

sunshaoce updated this revision to Diff 427929.
sunshaoce added a comment.

Fully support zfinx codegen


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122918/new/

https://reviews.llvm.org/D122918

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/test/CodeGen/RISCV/float-arith-strict.ll
  llvm/test/CodeGen/RISCV/float-arith.ll
  llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
  llvm/test/CodeGen/RISCV/float-br-fcmp.ll
  llvm/test/CodeGen/RISCV/float-convert-strict.ll
  llvm/test/CodeGen/RISCV/float-convert.ll
  llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
  llvm/test/CodeGen/RISCV/float-fcmp.ll
  llvm/test/CodeGen/RISCV/float-frem.ll
  llvm/test/CodeGen/RISCV/float-imm.ll
  llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
  llvm/test/CodeGen/RISCV/float-intrinsics.ll
  llvm/test/CodeGen/RISCV/float-isnan.ll
  llvm/test/CodeGen/RISCV/float-mem.ll
  llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
  llvm/test/CodeGen/RISCV/float-round-conv.ll
  llvm/test/CodeGen/RISCV/float-select-fcmp.ll

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